Designing a Sigma-Delta ADC from Behavioral Model to Verilog and VHDL - MATLAB爱好者论坛-LabFans.com

labfans · 2019-10-31, 18:04

Using disparate tools and languages to develop analog mixed-signal ICs makes the design process prone to error, time-consuming, and complicated. Model-Based Design addresses these problems by enabling engineers to complete all design stages in MATLAB and Simulink. By using a Simulink model as the cornerstone of design, teams can test and verify the design at all stages of development, reducing the chances of discovering expensive structural changes or bugs at the implementation stage.

2007-09-27 12:00 PM

更多...

2019-10-31, 18:04	#1
labfans 论坛管理员注册日期: 2007-04-03 帖子: 784 声望力: 5	Designing a Sigma-Delta ADC from Behavioral Model to Verilog and VHDL Using disparate tools and languages to develop analog mixed-signal ICs makes the design process prone to error, time-consuming, and complicated. Model-Based Design addresses these problems by enabling engineers to complete all design stages in MATLAB and Simulink. By using a Simulink model as the cornerstone of design, teams can test and verify the design at all stages of development, reducing the chances of discovering expensive structural changes or bugs at the implementation stage. 2007-09-27 12:00 PM 更多...