poster
2021-08-07, 03:07
When implemented on an ASIC, a neural network designed by NXP Eindhoven requires just 15% of the area of the ADC while consuming roughly 16 times less power under normal operating conditions.
2021-08-06 08:00 AM
More... ( https://www.mathworks.com/company/newsletters/articles/post-correcting-adc-errors-with-neural-networks.html )
2021-08-06 08:00 AM
More... ( https://www.mathworks.com/company/newsletters/articles/post-correcting-adc-errors-with-neural-networks.html )